All delegates will receive a conference booklet, containing the programme, detailed session listings and helpful London-related information, upon arrival. You can view a PDF version of the booklet here.

The programme for FPL 2015 will be as follows:

Wednesday 2 September 2015

Thursday 3 September 2015

Friday 4 September 2015

Monday 31 August 2015

Location: Electrical Engineering, Imperial College London

	Room 611	Room 1109	Room 507
08:30 – 09:00	Registration
09:00 – 10:30	Workshop W1: ReC4P 2015 – First International Workshop on Reconfigurable Computing for HPC and HPDA	Tutorial T1: NetFPGA – Rapid Prototyping of High-bandwidth Devices in Open Source	Industrial workshop IW1: Xilinx System Design with Zynq
10:30 – 11:00	Coffee break Room 509
11:00 – 12:30	Workshop W1: ReC4P 2015 – First International Workshop on Reconfigurable Computing for HPC and HPDA	Tutorial T1: NetFPGA – Rapid Prototyping of High-bandwidth Devices in Open Source	Industrial workshop IW1: Xilinx System Design with Zynq
12:30 – 13:30	Lunch Room 509
13:30 – 15:00		Tutorial T2: Rapid Development of Real-time Applications with National Instruments LabVIEW	Industrial workshop IW1: Xilinx System Design with Zynq
15:00 – 15:30	Coffee break Room 509
15:30 – 17:00		Tutorial T2: Rapid Development of Real-time Applications with National Instruments LabVIEW	Industrial workshop IW1: Xilinx System Design with Zynq

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Tuesday 1 September 2015

Location: Electrical Engineering, Imperial College London

	Room 611	Room 1109	Room 304	Room 507
08:30 – 09:00	Registration
09:00 – 10:30	Workshop W3: FSP 2015 – Second International Workshop on FPGAs for Software Programmers	Tutorial T3: Underneath the FPGA Clothes – Enhancing Security	Industrial workshop IW2: Overview of Altera's Cyclone V SoC Devices and Design Tools	Industrial workshop IW3: Xilinx SDSoC: Building Software-defined Systems-on-Chip with Zynq All-programmable SoCs
10:30 – 11:00	Coffee break Room 509
11:00 – 12:30	Workshop W3: FSP 2015 – Second International Workshop on FPGAs for Software Programmers	Tutorial T3: Underneath the FPGA Clothes – Enhancing Security	Industrial workshop IW2: Overview of Altera's Cyclone V SoC Devices and Design Tools	Industrial workshop IW3: Xilinx SDSoC: Building Software-defined Systems-on-Chip with Zynq All-programmable SoCs
12:30 – 13:30	Lunch Room 509
13:30 – 15:00	Workshop W3: FSP 2015 – Second International Workshop on FPGAs for Software Programmers	Tutorial T4: The LEAP Run-time System – Rapid System Integration of Your HLS Kernels	Industrial workshop IW2: Overview of Altera's Cyclone V SoC Devices and Design Tools	Industrial workshop IW3: Xilinx SDSoC: Building Software-defined Systems-on-Chip with Zynq All-programmable SoCs
15:00 – 15:30	Coffee break Room 509
15:30 – 17:00	Workshop W3: FSP 2015 – Second International Workshop on FPGAs for Software Programmers	Tutorial T4: The LEAP Run-time System – Rapid System Integration of Your HLS Kernels	Industrial workshop IW2: Overview of Altera's Cyclone V SoC Devices and Design Tools	Industrial workshop IW3: Xilinx SDSoC: Building Software-defined Systems-on-Chip with Zynq All-programmable SoCs

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Wednesday 2 September 2015

Location: Royal Institution

	Theatre	Conversation Room	Demo Room
08:15 – 08:45	Registration
08:45 – 09:00	Welcome session Theatre
09:00 – 10:00	Keynote: Extending the Power of FPGAs to Software Developers – Salil Raje (Xilinx, US) Theatre
10:00 – 10:40	Coffee break & poster session: PhD Forum Georgian Room
10:40 – 12:00	Technical session Applications 1: Linear Algebra and Control Applications	Technical session Architectures & Technology 1: Energy-efficient and Low-power Architectures	Technical session Design Methods & Tools 1: Parallelism and Logic Design
12:00 – 13:00	Lunch Library & Georgian Room
13:00 – 14:00	Keynote: Applications of FPGAs to the Financial Trading Industry – David Lariviere (Columbia University, US) Theatre
14:00 – 15:00	Special session: FPL – The Past 25 Years and the Next 25 Years Theatre
15:00 – 15:40	Coffee break & poster Session: Applications Georgian Room
15:40 – 17:00	Special session: FPL – The Past 25 Years and the Next 25 Years Theatre
18:00 – 18:15	Introduction to significant papers: Philip Leong (University of Sydney, AU) Library
18:15 – 20:00	Demo night & canapé reception Library

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Thursday 3 September 2015

Location: Royal Institution

	Theatre	Conversation room	Demo room
08:30 – 09:00	Registration
09:00 – 10:00	Keynote: Architectural Paths to Faster and More Robust FPGAs – Mike Hutton (Altera, US) Theatre
10:00 – 10:40	Coffee break & poster session: Architectures & Technology Georgian Room
10:40 – 12:00	Technical session Applications 2: Computer Vision and Numerical Applications	Technical session Architectures & Technology 2: Cryptography and Security Architectures	Technical session Design Methods & Tools 2: Accelerators and High-level Synthesis
12:00 – 13:00	Lunch Library & Georgian Room
13:00 – 13:50	Keynote: European High-performance Computing Strategy and Outlook – Panagiotis Tsarchopoulos (European Commission, BE) Theatre
13:50 – 14:00	Introduction to FPL 2016 – Paolo Ienne (École Polytechnique Fédérale de Lausanne, CH) Theatre
14:00 – 15:00	Technical session Applications 3: Pattern-matching and Search Applications	Technical session Architectures & Technology 3: Reconfigurable Computing and Architectures	Technical session Design Methods & Tools 3: Simulation and Emulation
15:00 – 15:40	Coffee break & poster session: Design Methods & Tools Georgian Room
15:40 – 17:00	Technical session Applications 4: High-level Synthesis and Optimisation	Technical session Architectures & Technology 4: Architectures and Synthesis	Technical session Design Methods & Tools 4: Hybrid FPGA-based Systems

Location: Sherfield Building, Imperial College London

18:15 – 21:00

Banquet & best paper awards
Queen's Tower Rooms

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Friday 4 September 2015

Location: Royal Institution

	Theatre	Conversation room	Demo room
08:30 – 09:00	Registration
09:00 – 10:00	Keynote: Field-programmable Neurocomputing – Steve Furber (University of Manchester, UK) Theatre
10:00 – 10:40	Coffee break & poster session: Self-aware & Adaptive Systems Georgian Room
10:40 – 12:15	Workshop W4: RC4Masses – Workshop on Reconfigurable Computing for the Masses, Really?	Workshop W5: WCS-IoT 2015 – First International Workshop on Components and Services for IoT platforms	Technical session Architectures & Technology 5: Memory Management and Customised Architectures
12:15 – 12:30	Closing session Theatre

Location: Electrical Engineering, Imperial College London

	Room 408	Room 611
13:00 – 13:30	Lunch (for workshop attendees only) Room 509
13:30 – 15:00	Workshop W4: RC4Masses – Workshop on Reconfigurable Computing for the Masses, Really?	Workshop W5: WCS-IoT 2015 – First International Workshop on Components and Services for IoT platforms
15:00 – 15:30	Coffee break Room 509
15:30 – 17:00	Workshop W4: RC4Masses – Workshop on Reconfigurable Computing for the Masses, Really?	Workshop W5: WCS-IoT 2015 – First International Workshop on Components and Services for IoT platforms
17:00 – 18:30	Workshop W4: RC4Masses – Workshop on Reconfigurable Computing for the Masses, Really?

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